Category: Conference papers

COMON – The European Compact Modeling Network
Advance Program IWCM, Yokohama, Japan
W.Grabinski, B.Iniguez, J.M.Sallese, A.Bazigos, D.Tomaszewski, M.Yakupov, G.Depeyrot

COMON – The European Compact Modeling Network Advance Programm IWCM, Jan. 25, 2011, Yokohama, Japan W. Grabinski, B. Iniguez, J.-M. Sallese, A. Bazigos, D. Tomaszewski, M. Yakupov, G. Depeyrot Index Terms — Compact modeling, SPICE, Verilog-A, analog/RF IC CMOS, multiple-gate MOSFET, IIIV HEMT, HV MOSFET, Monte-Carlo analysis, statistical modeling COMON is the European FP7 Marie-Curie …

COMON – The European Compact Modeling Network
Advance Program IWCM, Yokohama, Japan
W.Grabinski, B.Iniguez, J.M.Sallese, A.Bazigos, D.Tomaszewski, M.Yakupov, G.Depeyrot
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Silicon Qualified SuperViC: the only way to safe SoC integration
ICCAD 2010, in Wuxi, China
W.Guo, L.Engels

Introduction System integrators often encounter problems on application boards too late in the design cycle, when bringing together Virtual Components (ViCs of silicon IPs) into a system. Some ViC performances may be degraded at higher levels (SoC and PCB), and thus the final system does not perform as well as expected. In other words, assembling …

Silicon Qualified SuperViC: the only way to safe SoC integration
ICCAD 2010, in Wuxi, China
W.Guo, L.Engels
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SMASH: a Verilog-A simulator for analog designers
MOS-AK 2010, Sept. 17 2010 in Sevilla
G.Depeyrot, F.Poullet, B.Dumas

SMASH: a Verilog-A simulator for analog designers MOS-AK 2010, Sept. 17 2010 in Sevilla Gilles DEPEYROT & Frédéric POULLET & Benoît DUMAS With the SPICE compatibility extensions of the Verilog-AMS Language Reference Manual, Verilog-A has the potential to revolutionize the paradigm of analog design of integrated circuits and totally replace SPICE. The achievement of this …

SMASH: a Verilog-A simulator for analog designers
MOS-AK 2010, Sept. 17 2010 in Sevilla
G.Depeyrot, F.Poullet, B.Dumas
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Guidelines for Verilog-A Compact Model Coding
MOS-AK 2009, Athens
G. DEPEYROT, F. POULLET

Guidelines for Verilog-A Compact Model Coding MOS-AK 2009, Sept. 18 2009 in Athens Gilles DEPEYROT & Frédéric POULLET Verilog-A has practically become the standard for developing and coding compact device models. However, contrarily to the Verilog standard, where the IEEE has defined syntax and semantic rules for both simulation and synthesis (IEEE1364-2001 and IEEE 1364.1-2002), …

Guidelines for Verilog-A Compact Model Coding
MOS-AK 2009, Athens
G. DEPEYROT, F. POULLET
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