A Breakthrough in Logic Design Drastically Improving Performances from 65 55 nm LP and BelowTSMC 2012 Open Innovation Platform® Ecosystem ForumE.Bernard-Moulin, I.Sever
Paper available for download on TSMC website
Paper available for download on TSMC website
Paper available for download on TSMC website
COMON – The European Compact Modeling Network Advance Programm IWCM, Jan. 25, 2011, Yokohama, Japan W. Grabinski, B. Iniguez, J.-M. Sallese, A. Bazigos, D. Tomaszewski, M. Yakupov, G. Depeyrot Index Terms — Compact modeling, SPICE, Verilog-A, analog/RF IC CMOS, multiple-gate MOSFET, IIIV HEMT, HV MOSFET, Monte-Carlo analysis, statistical modeling COMON is the European FP7 Marie-Curie
Introduction System integrators often encounter problems on application boards too late in the design cycle, when bringing together Virtual Components (ViCs of silicon IPs) into a system. Some ViC performances may be degraded at higher levels (SoC and PCB), and thus the final system does not perform as well as expected. In other words, assembling
SMASH: a Verilog-A simulator for analog designers MOS-AK 2010, Sept. 17 2010 in Sevilla Gilles DEPEYROT & Frédéric POULLET & Benoît DUMAS With the SPICE compatibility extensions of the Verilog-AMS Language Reference Manual, Verilog-A has the potential to revolutionize the paradigm of analog design of integrated circuits and totally replace SPICE. The achievement of this