Revolutionnary ultra-low power SoC architectures

CPU-less data management subsystems enablement for ultimate energy efficiency

Subsystem architectures are the most important choices to save energy

Designers usually build their SoC based on pre-designed & pre-verified subsystem architectures.
The architecture choice is extremely important to maximize energy efficiency. We have experienced more than 100x energy efficiency improvement thanks to novel subsystem architectures. Innovating in this area is definitely the right path to push back SoC energy efficiency limits.

CPU-less data management subsystem is the future for ultimate energy efficiency gains

CPU-less data management system architectures do not suffer from the CPU-centric architectures limitations.
The data can be autonomously stored and treated trough a smart DMA without involving the CPU, leading to significant power & latency savings. Moreover with an improved bus & memory architecture the CPU can perform other tasks and access to the memory in parallel, leading to drastic performance  improvements.
We have developed a unique subsystem approach based on a CPU-less data management system technology.

Sub-systems MCU

CPU-centric subsystem are limited in energy efficiency

In the CPU-centric architecture (the most common architecture used in the industry) the CPU is involved at every data event on peripherals. When it is turned in deep sleep mode, at each data event, the CPU context needs to be restored, leading to significant latency and power overhead.
Moreover, while the CPU keeps busy treating the data, it cannot perform other tasks, leading to severe performance limitations.

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