- Flexible & pre-verified event-based IP architecture
- Fast & efficient CPU-less data collection & filtering
- Fully interoperable with SPIDER power management platform

Event-Based MCU Sub-system

CHAMELEON is a flexible & pre-verified  event-based MCU subsystem platform embedding several standard peripherals, an autonomous DMA, a fined-grained power management unit, a tiny ML accelerator, a low latency interconnect, and an event manager.

It allows fast & efficient CPU-less data collection & filtering, enabling extremely low power consumption in both deep sleep and active modes.

CHAMELEON is compatible with all cores and is fully interoperable with Dolphin Spider power management platform.

The platform comes with an RTL configurator tool and all necessary drivers.

At the heart of CHAMELEON: a revolutionary CPU-less data management architecture

CPU-less data management system architectures do not suffer from the CPU-centric architectures limitations.

The data can be autonomously stored and treated through a smart DMA without involving the CPU, leading to significant power & latency savings. Moreover with an improved bus & memory architecture the CPU can perform other tasks and access the memory in parallel, leading to drastic performance  improvements.

Outstanding advantages

Ultra-responsive operation

- Low latency CPU-less operations capability
- High bandwidth to SRAM through innovative low latency interconnect
- Tiny Machine Learning (ML) accelerator with 32 MAC/cycle

Ultimate Energy Efficiency

- Event-based architecture
- Optimized for fine grained power management
- <15 µA/MHz & 1.5µA deep sleep in 22FDX

Plug & Play subsystem

- Standard AMBA interface with any CPU/DSP/NPU
- High bandwidth memory access

Secured Silicon

- Pre-verified architecture
- Silicon proven in 40LP & 22FDX

Next Platform: Need to embed energy efficient processing in your SoC?

Want to know more? Contact us and download our white paper "At the edge of data processing"

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