Category: Conference papers

Succeeding in Implementing a Low-Power SoC with Power Islands
SNUG 2015

With the growth of markets related to the Internet of Things, the requirements in terms of very low-power consumption for the connected “things” push SoC/ASIC designers and architects to hunt down mA, and even µA, from specification until first silicon prototype validation. The level of experience in low-power strategy definition and implementation is very different …

Succeeding in Implementing a Low-Power SoC with Power Islands
SNUG 2015
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Keynote speech: Irrationality for the Semiconductor Industry
IP SoC Days Shanghai, China
M. Depeyrot

Contemplating the last 50 years takes us back to California, more precisely to Stanford University and to the year 1964, three years after Carl G. Jung’s death in Switzerland, founding father of the psychology of cultures and our best guide to the deep unconscious. Over the sixties, pioneer Fairchild Instruments sired Semiconductor start-ups over “the …

Keynote speech: Irrationality for the Semiconductor Industry
IP SoC Days Shanghai, China
M. Depeyrot
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Faster and safer design for integration presentation of power-optimized SoCs
IP SoC 2012, Grenoble, France
L.Engels, A.Bonzo, G.Gimenez, A.Lacourse, F.Darve

Abstract The construction of low-power islets through: The optimization of the power management network, early in the design flow (i.e. before RTL design), through simulation with behavioral models using rough power consumption estimations. .. And all along the low-power design flow. The implementation of power islets with specific innovative cell and automatic script to handle …

Faster and safer design for integration presentation of power-optimized SoCs
IP SoC 2012, Grenoble, France
L.Engels, A.Bonzo, G.Gimenez, A.Lacourse, F.Darve
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How to define a robust and power-optimized power management architecture
IP SoC 2012, Grenoble, France
S.Genevey

Abstract Context: SoCs complexity increase with constraint of power consumption reduction. Solution to reduce power consumption: SoC partitioning in power and voltage islets with several states of activity. Issue to solve: properly select the power management network (PMNet) including power regulators, external and internal capacitors to sustain the voltage drops caused by mode transitions. Traps: …

How to define a robust and power-optimized power management architecture
IP SoC 2012, Grenoble, France
S.Genevey
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