Category: Conference papers

Tutorial : Dynamic aging compensation – the next key enabler of automotive products
IRPS 2019

Speaker: Vincent Huard, CTO Vincent Huard presented this tutorial together with Joerg Winkler, from GLOBALFOUNDRIES during the tutorial session at IPRS conference (International Reliability Physics Symposium). The automotive products, driven by ADAS needs, are now moving to very advanced CMOS nodes. This trend is helping a lot from soft errors perspective with a reduced architectural …

Tutorial : Dynamic aging compensation – the next key enabler of automotive products
IRPS 2019
Read More »

Addressing the Energy Efficiency Challenges of IoT end points
IP SoC Grenoble

Speaker: Pierre Gazull – Business Development & Product Marketing Manager, IoT Pierre Gazull introduced this presentation during IoT session at the IP SoC Grenoble on december 06, 2018. To discover our innovative offering addressing the Energy Efficiency Challenges, contact us Download this press release

Addressing the Energy Efficiency Challenges of IoT end points
Japan SOI Design Workshop

Dolphin Integration introduced this conference paper at the Japan SOI Design Workshop on october 25, 2018. During this workshop, we have met leading companies working with SOI technologies and discussed about the challenges addressed when designing with FD & RF SOI technologies. To discover our innovative offering addressing the Energy Efficiency Challenges, contact us Access …

Addressing the Energy Efficiency Challenges of IoT end points
Japan SOI Design Workshop
Read More »

Addressing the Energy Efficiency Challenges of IoT end points
SOI Consortium Shanghai

Speaker: Frederic Renoux, eVP of Dolphin Integration Improving the energy-efficiency of SoCs has become a major challenge for most applications, be they battery-powered such as Wearables or Automotive or line-powered such as Home Multimedia or Servers. The integration of the power regulation network on SoC is the best approach to improve energy-efficiency while reducing BoM …

Addressing the Energy Efficiency Challenges of IoT end points
SOI Consortium Shanghai
Read More »

Cost-effective design of next generation of ultra-low power SoCs – More Intelligent Design needed
D&R IP-SoC 2017

The semiconductor industry is entering into the new era of More Intelligent Designs, whereby more complex SoC power architectures must be adopted to meet the low power challenges of battery-powered devices, as leveraging the fabrication process capabilities is no longer sufficient. Dolphin Integration’s “Enabling Trio”, combining new a breed of silicon IPs, EDA solution and …

Cost-effective design of next generation of ultra-low power SoCs – More Intelligent Design needed
D&R IP-SoC 2017
Read More »

Concerned about security? Don’t leave your memories unprotected
D&R IP-SoC 2017

Today’s typical SoC includes between tens to hundreds of embedded SRAM instances & Register-Files, used in practically every aspect of the system, and storing data of various levels of importance – from worthless statistical data & media to priceless information such as personal data, passwords and security keys. Leaving memory blocks unprotected is making them …

Concerned about security? Don’t leave your memories unprotected
D&R IP-SoC 2017
Read More »

Embedding power regulation & activity control networks for best SoC PPA
SOI Industry Consortium

Dolphin Integration introduce this article at the Nanjing SOI Workshop & tutorial on september 21 – 22, 2017. This event was sponsored by the City of Nanjing, co-organized by SOI Industry Consortium. Over 200 participants attended the workshop and tutorial about SOI applications, SoC development and manufacturing, EDA & IP ecosystem, and the design tutorial …

Embedding power regulation & activity control networks for best SoC PPA
SOI Industry Consortium
Read More »

Succeeding in Implementing a Low-Power SoC with Power Islands
SNUG 2015

With the growth of markets related to the Internet of Things, the requirements in terms of very low-power consumption for the connected “things” push SoC/ASIC designers and architects to hunt down mA, and even µA, from specification until first silicon prototype validation. The level of experience in low-power strategy definition and implementation is very different …

Succeeding in Implementing a Low-Power SoC with Power Islands
SNUG 2015
Read More »