SMASH: a Verilog-A simulator for analog designers
MOS-AK 2010, Sept. 17 2010 in Sevilla
G.Depeyrot, F.Poullet, B.Dumas

SMASH: a Verilog-A simulator for analog designers

MOS-AK 2010, Sept. 17 2010 in Sevilla

Gilles DEPEYROT & Frédéric POULLET & Benoît DUMAS

With the SPICE compatibility extensions of the Verilog-AMS Language Reference Manual, Verilog-A has the potential to revolutionize the paradigm of analog design of integrated circuits and totally replace SPICE. The achievement of this goal depends on the adoption of Verilog-A by all concerned actors: EDA vendors, compact model developers, semiconductor foundries as well as final users. However, both final users and semiconductor foundries cannot accept degradation in simulation speed, memory consumption, or loss of functionalities. Based on the previously presented and published Verilog-A Compact Model Coding Guidelines, this presentation will take stock on the evolutions of SMASH during the recent years to make the Verilog-A simulator as competitive as the SPICE one in the context of analog design.

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