Category: Technical papers

Spinner System by Dolphin Integration: optimized design and integration methodology based on pulsed latch for drastic area reduction in logic designs
L.Jure

Spinner System by Dolphin Integration: optimized design and integration methodology based on pulsed latch for drastic area reduction in logic designs Lionel JURE Systems-on-a-chip (SoC) design complexity is continuously increasing over the years, and 100 Million gates circuits are now taping out. Additionally, the logic gate count has evolved so as to represent in average …

Spinner System by Dolphin Integration: optimized design and integration methodology based on pulsed latch for drastic area reduction in logic designs
L.Jure
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IcyHeart: Highly integrated ultra-low-power SoC solution for unobtrusive and energy efficient wireless cardiac monitoring
IEEE 12th International Conference on BioInformatics and BioEngineering
F.Masson, M.Milis, K.Michaelides, A.Kounoudes,…

IcyHeart: Highly integrated ultra-low-power SoC solution for unobtrusive and energy efficient wireless cardiac monitoring: Research project for the benefit of specific groups (FP7, Capacities) IEEE 12th International Conference on BioInformatics and BioEngineering Milis, M.; Michaelides, K.; Kounoudes, A.; Ansaloni, G.; Atienza, D.; Giroud, F.; Ruedi, P.; Masson, F. The objective of the IcyHeart project is …

IcyHeart: Highly integrated ultra-low-power SoC solution for unobtrusive and energy efficient wireless cardiac monitoring
IEEE 12th International Conference on BioInformatics and BioEngineering
F.Masson, M.Milis, K.Michaelides, A.Kounoudes,…
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Period Deviation Tolerance Templates: A Novel Approach to Evaluation and Specification of Self-Synchronizing Audio Converters
AES Convention:133 – Paper Number: 8729
F.Legray, T.Heeb, S.Genevey, H.Kuo

Period Deviation Tolerance Templates: A Novel Approach to Evaluation and Specification of Self-Synchronizing Audio Converters AES Convention:133 (October 2012) – Paper Number: 8729 Legray, Francis; Heeb, Thierry; Genevey, Sebastien; Kuo, Hugo Subject: Amplifiers, Transducers, and Equipment Self-synchronizing converters represent an elegant and cost effective solution for audio functionality integration into SoC (System-on-Chip) as they integrate …

Period Deviation Tolerance Templates: A Novel Approach to Evaluation and Specification of Self-Synchronizing Audio Converters
AES Convention:133 – Paper Number: 8729
F.Legray, T.Heeb, S.Genevey, H.Kuo
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Simulation Study of Nanoscale Double-Gate CMOS Circuits Using Compact Advanced Transport Models
MIXDES 2012, 19th International Conference “Mixed Design of Integrated Circuits and Systems”, Warsaw, Poland
M.Cheralathan, E.Contreras, J.Alvarado,…

Simulation Study of Nanoscale Double-Gate CMOS Circuits Using Compact Advanced Transport Models MIXDES 2012, 19th International Conference “Mixed Design of Integrated Circuits and Systems”, May 24-26, 2012, Warsaw, Poland M. Cheralathan, E. Contreras, J. Alvarado, A. Cerdeira & B. Iñiguez Index Terms — Double-gate MOSFET, Hydrodynamic, Verilog-A, SMASH. In this paper we present the results …

Simulation Study of Nanoscale Double-Gate CMOS Circuits Using Compact Advanced Transport Models
MIXDES 2012, 19th International Conference “Mixed Design of Integrated Circuits and Systems”, Warsaw, Poland
M.Cheralathan, E.Contreras, J.Alvarado,…
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Automated on-the-fly verification of designs using detector-based methodology
S4D – System, Software, SoC and Silicon Debug Conference, Munich, Germany
D.Dammers, W.Guo, F.Masson, L.M.Voßkämper

Automated on-the-fly verification of designs using detector-based methodology Dirk Dammers, Wei Guo, Frédéric Masson, Lars M. Voßkämper Mixed-signal simulation of systems, i.e. analog & digital electronics with attached peripherals, such as sensors and actuators, already has an essential place in today’s design process. While the verification of the digital parts, mostly implemented in Verilog and …

Automated on-the-fly verification of designs using detector-based methodology
S4D – System, Software, SoC and Silicon Debug Conference, Munich, Germany
D.Dammers, W.Guo, F.Masson, L.M.Voßkämper
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Challenges of Monitoring High-voltage Battery Packs in Hybrid and Electric Vehicles
W.Guo, C.Domingues
June 2011 GSA Forum

Worldwide concerns of climate change and oil supply have triggered great interest in the electric vehicle (EV) and hybrid EV (HEV) segment of the automotive market. This rapid growth segment is also stimulated by the development of rechargeable batteries. As these “green” vehicles are powered by high-voltage (HV) battery packs consisting of hundreds of series-connected …

Challenges of Monitoring High-voltage Battery Packs in Hybrid and Electric Vehicles
W.Guo, C.Domingues
June 2011 GSA Forum
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Power efficiency in mobile audio headphone applications
P.Giletti

Power efficiency in mobile audio headphone applications Paul Giletti A key for the success of mobile audio resides in power consumption reduction, as the battery must handle more applications and last a longer time. Regarding the analog audio, referred to as the audio CODEC where specifications mainly focus on the stereo playback mode, quiescent power …

Power efficiency in mobile audio headphone applications
P.Giletti
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Reducing Power Consumption of microcontroller sub-systems using a Cache Controller
O.Montfort

Reducing Power Consumption of microcontroller sub-systems using a Cache Controller Olivier Montfort Introduction Strong market requirements for decreasing the power consumption of embedded systems and increasing complexity of systems-on-chip require innovative solutions addressing such needs. In microcontrollers systems using memories like Flash, OTP, EPROM or EEPROM, the memories can consume a large part of the …

Reducing Power Consumption of microcontroller sub-systems using a Cache Controller
O.Montfort
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Guidelines for Verilog-A Compact Model Coding
Nanotech 2010 Vol. 2, pp. 821-824, June 2010
G. Depeyrot, F. Poullet and B. Dumas

Keywords: Verilog-A, compact model, SPICE Verilog-A has practically become the standard for developing and coding compact device models. However, contrarily to the Verilog standard, where the IEEE has defined syntax and semantic rules for both simulation and synthesis (IEEE1364-2001 and IEEE 1364.1-2002), the Verilog-AMS hardware description language includes extensions dedicated to compact modeling, as a …

Guidelines for Verilog-A Compact Model Coding
Nanotech 2010 Vol. 2, pp. 821-824, June 2010
G. Depeyrot, F. Poullet and B. Dumas
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