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Power Management Network, Design Methodology and Verification to Secure RFID Product Tape-Out
DesignCon Conference 2014, Santa Clara, CA
A.Lacourse, M.Lapointe, E.Bernard-Moulin

Power Management Network Design Methodology and Verification to Secure RFID Product Tape-Out Alain Lacourse, Marcel Lapointe, Elsa Bernard-Moulin This paper introduces a parallel association of regulators named Retention Alternating Regulator (RAR) as an innovative solution to achieve the best performances in both normal and retention modes in the context of an RFID active tag System-on-Chip.

Power Management Network, Design Methodology and Verification to Secure RFID Product Tape-Out
DesignCon Conference 2014, Santa Clara, CA
A.Lacourse, M.Lapointe, E.Bernard-Moulin
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Complete power metering silicon IP solution by Dolphin Integration: How to specify and integrate successfully a measurement analog front-end including its power computation engine in an energy metering IC
C.Domingues, L.Pierrefeu, H.Kuo

Complete power metering silicon IP solution by Dolphin Integration: How to specify and integrate successfully a measurement analog front-end including its power computation engine in an energy metering IC Christian Domingues, Lionel Pierrefeu, Hugo KUO With the rapid growth of worldwide demand for smart electric meters, for new installations or for replacing old ones, the

Complete power metering silicon IP solution by Dolphin Integration: How to specify and integrate successfully a measurement analog front-end including its power computation engine in an energy metering IC
C.Domingues, L.Pierrefeu, H.Kuo
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Small Signal Simulation in the s-Plane
EDN
F.Poullet, G.Depeyrot, F.Espalieu

Small Signal Simulation in the s-Plane Frédéric Poullet, Gilles Depeyrot, Florian Espalieu In analog circuit design, small-signal analysis is one of the first steps for studying the stability of the circuit or obtaining the transfer function (voltage gain, trans-impedance, power rejection, etc.). This analysis linearizes all of the non-linear devices in the circuit; the resultant

Small Signal Simulation in the s-Plane
EDN
F.Poullet, G.Depeyrot, F.Espalieu
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Spinner System by Dolphin Integration: optimized design and integration methodology based on pulsed latch for drastic area reduction in logic designs
L.Jure

  Spinner System by Dolphin Integration: optimized design and integration methodology based on pulsed latch for drastic area reduction in logic designs   Lionel JURE Systems-on-a-chip (SoC) design complexity is continuously increasing over the years, and 100 Million gates circuits are now taping out. Additionally, the logic gate count has evolved so as to represent

Spinner System by Dolphin Integration: optimized design and integration methodology based on pulsed latch for drastic area reduction in logic designs
L.Jure
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IcyHeart: Highly integrated ultra-low-power SoC solution for unobtrusive and energy efficient wireless cardiac monitoring
IEEE 12th International Conference on BioInformatics and BioEngineering
F.Masson, M.Milis, K.Michaelides, A.Kounoudes,…

IcyHeart: Highly integrated ultra-low-power SoC solution for unobtrusive and energy efficient wireless cardiac monitoring: Research project for the benefit of specific groups (FP7, Capacities) IEEE 12th International Conference on BioInformatics and BioEngineering Milis, M.; Michaelides, K.; Kounoudes, A.; Ansaloni, G.; Atienza, D.; Giroud, F.; Ruedi, P.; Masson, F. The objective of the IcyHeart project is

IcyHeart: Highly integrated ultra-low-power SoC solution for unobtrusive and energy efficient wireless cardiac monitoring
IEEE 12th International Conference on BioInformatics and BioEngineering
F.Masson, M.Milis, K.Michaelides, A.Kounoudes,…
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Period Deviation Tolerance Templates: A Novel Approach to Evaluation and Specification of Self-Synchronizing Audio Converters
AES Convention:133 – Paper Number: 8729
F.Legray, T.Heeb, S.Genevey, H.Kuo

Period Deviation Tolerance Templates: A Novel Approach to Evaluation and Specification of Self-Synchronizing Audio Converters AES Convention:133 (October 2012) – Paper Number: 8729 Legray, Francis; Heeb, Thierry; Genevey, Sebastien; Kuo, Hugo Subject: Amplifiers, Transducers, and Equipment Self-synchronizing converters represent an elegant and cost effective solution for audio functionality integration into SoC (System-on-Chip) as they integrate

Period Deviation Tolerance Templates: A Novel Approach to Evaluation and Specification of Self-Synchronizing Audio Converters
AES Convention:133 – Paper Number: 8729
F.Legray, T.Heeb, S.Genevey, H.Kuo
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Simulation Study of Nanoscale Double-Gate CMOS Circuits Using Compact Advanced Transport Models
MIXDES 2012, 19th International Conference “Mixed Design of Integrated Circuits and Systems”, Warsaw, Poland
M.Cheralathan, E.Contreras, J.Alvarado,…

Simulation Study of Nanoscale Double-Gate CMOS Circuits Using Compact Advanced Transport Models MIXDES 2012, 19th International Conference “Mixed Design of Integrated Circuits and Systems”, May 24-26, 2012, Warsaw, Poland M. Cheralathan, E. Contreras, J. Alvarado, A. Cerdeira & B. Iñiguez Index Terms — Double-gate MOSFET, Hydrodynamic, Verilog-A, SMASH. In this paper we present the results

Simulation Study of Nanoscale Double-Gate CMOS Circuits Using Compact Advanced Transport Models
MIXDES 2012, 19th International Conference “Mixed Design of Integrated Circuits and Systems”, Warsaw, Poland
M.Cheralathan, E.Contreras, J.Alvarado,…
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