Current consumption of an IR-UWB receiver is reduced thanks to duty-cycling techniques applied to the full analog chain, thus benefiting from the impulsive nature of the signal. The coherent architecture performs down conversion by mixing the incoming pulse with a locally generated 2.75ns pulse template and needs only a 1GHz frequency synthesis instead of a power hungry 4 or 8 GHz LO. Duty cycling with sub-ns settling time enables up to 82% current savings for the front-end at a 15.6MHz pulse repetition frequency. To operate in a strong interference environment, an optional 4th order Gm-C filter may be switched on. The receiver for IR-UWB communications and ranging is implemented in CMOS 130nm and measurement results confirm the expectations.
