Challenges in mixed-signal design for the SoC areaDate Conference, München, Germany (2001)J.F.Pollet
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Virtual test with VHDL-AMS for a Generator of Analog and Mixed Signal Virtual componentViuf (1999)B.Babba, G.Barret, F.Poullet
Abstract With the increase in the complexity of systems with mixed-signal components, many systems designers recognize advantages and necessity of the mixed-signal simulation of these systems as a whole. Unfortunately, modeling and simulating such complex systems takes an enormous amount of time. The first problem identified is the speed of analog simulation. The second problem
Electromechanical Modeling beyond VHDL-AMSIEEE/ACM International Workshop on Behavioral Modeling and Simulation (BMAS), Orlando, Florida, USAL.M.Voßkämper, A.Lüdecke, M.Leineweber, G.Pelz
Abstract Analytical modeling for electromechanics sometimes requires features like the representation of bended struc- tures, the inclusion of (moving) boundary conditions or spatial integrations and differentiations. All these points are currently not directly addressed in VHDL-AMS and other analog hardware description languages. This paper illustrates this, using the example of a capacitive pressure sensor. The
Technology Trends: Design automation – More work needed on mixed-signal VC frontElectronic Engineering TimesJ.F.Pollet
System-on-a-chip (SOC) designs involving mixed-signal virtual components (VCs) require integration with thousands of logic gates without noise interference. Meeting the challenges of this type of design, Dolphin Integration and NEC Electronics (Europe) recently created a Codec VC for audio and telecommunications applications. The design successfully integrated A/D and D/A converters, programmable- gain functions and digital
