The growing popularity of smartphone and DTV applications with 4K displays translates into demand for a new generation of portable displays featuring high resolution and excellent power performance.
The TSMC 55nm HV process provides an efficient infrastructure to design cost-effective and low-power display drivers. Based on this technology, Dolphin Integration continues to strengthen its leading position by providing a new SRAM architecture specially designed to meet the requirements of the steadily expanding display driver market for high-resolution mobile handsets.
The SpRAM LYRA is designed for high density (through specific bitcell and architecture) with no compromise on speed and stand-by power consumption, thanks to several Vt selections to achieve the best speed versus leakage trade-off. In addition, LYRA provides flexibility for the easiest SoC integration:
- Use of only 3 metal layers to ease power routing over the RAM,
- Wide range of internal configurations (mux and bank) to allow specific form factors compliant with IC Driver position with respect to the screen.
The SpRAM LYRA enriches the sponsored memory offering at TSMC 55nm HV as:
- SpRAM RHEA: high-density and low-power single port RAM using 4 metal layers
- Via ROM TITAN: thanks to its patented bit cell, the ROM TITAN increases density up to 10 % versus alternative solutions at 55 nm
- 2PRFile ERA: high-density and low-power two port register files
In complement to this offering:
- Microcontroller cores ranging from 8-bit 8051 and 16-bit 80251 up to 32-bit 80351: for the best trade-off between power consumption and processing power or silicon area
Note that Dolphin Integration’s expertise has been prized by a TSMC Award (2014) for Specialty IPs due to its ability to address efficiently "More Than Moore" technologies. This acknowledged experience, 30 years, results from continuously renewed innovation at Dolphin Integration.
For more information on our catalog at TSMC 55 nm HV, contact firstname.lastname@example.org