Dolphin Design confirms the strengthening of their partnership with STMicroelectronics and the growth of their Custom Fabless activity by going to the next
step in their offering of Multi-Project Wafer: myMPW+.
Complementary to general purpose Grenoble offering from the CMP (Circuits Multi-Projets), myMPW+ consists in a secured Multi-Project Wafer run yearly at STMicroelectronics in
65nmLP, tailor made for sensitive applications of customers seeking confidentiality and traceability for their circuits. It allows volume variability from a few tens up
to a few thousand circuits at attractive prices.
myMPW+ gives the possibility to get a metal fix on the masks for improvements after the test of the first prototypes, as well as the capability to launch low to middle
volume fabrication after a first prototype acceptance, by using the same masks for deliveries spread over a couple of years, complemented with full traceability and
confidentiality all along a secured production chain, including even customer return management.
Dolphin Design will aggregate on their own mask sets the different circuits coming from various customers seeking confidentiality and traceability, which will then be
launched to fabrication jointly with regular contributions from CMP. This win-win partnership, by pooling silicon areas from Dolphin and CMP on a common 65nmLP MPW, will
guaranty fabrication at defined dates. The different fabrication steps are handled and controlled by Dolphin Design acting as Prime Contractor, within the business model
for ASIC services proposed through mySoC (please browse through mysoc.dolphin.fr). Once the wafers are out of foundry, special care is taken during the assembly phase, so
that unused devices are stored or destroyed by Dolphin Design. Depending on specific customer needs, the process may be stopped after receiving the prototypes, or when
needing a metal fix or new engineering samples for validation purposes, or the process may be extended with a low volume fabrication, once the prototypes are validated at
the system level.