To be competitive in the growing market of the Internet of Things, fabless IC suppliers expect to easily find complete solutions to optimize their whole SoC performances while meeting the stringent requirements for low-power optimization.
Dolphin Integration addresses these needs not only with its sponsored offering at TSMC 55 nm uLP and uLPeF but also with the relevant complements:
- A panoply of standard cell libraries, SESAME LOPAN, which combines an ultra-high density library SESAME uHD, reducing for most logic blocks power by up to 30 % while saving up to 15 % area together with an extra-low voltage library SESAME HD-eLV for optimizing always-on blocks.
- A kit of cells, SESAME CLICK, simplifying the design of power islands. This kit innovatively includes a dedicated cell clamping automatically the in-rush current to avoid IR Drop failures. This kit is delivered along with scripts for a faster and secured implementation.
- A Reusable Power Kit Library, of regulators per the DELTA standard, to build any optimized Power Management Network architecture for the lowest power consumption.
All these products are characterized at both 1.2 V+/-10% and 0.9 V+/-10%.
Dolphin Integration offering at TSMC 55 nm uLP/uLPeF
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