SPIDER - Power Management Platform

Our unique solution to speed-up and secure the design of energy efficient power management systems

The challenge

Energy efficiency has now replaced low power as one of the main challenges that the IC design teams are facing. From the adoption of smarter SoC architectures to the selection of the right process node, designers need to find solutions to integrate more and more functionalities in their end product while ensuring maximum performances with minimum energy consumption. At SoC-level, power management is a critical functionality to embed. It enables to control and sequence the way the energy is distributed to each block in the circuit. With more and more complex SoCs and low-power schemes to manage, the integration of power management requires a wide technical expertise from architecture to design and can drastically slow-down the conventional design cycle and increase the risk of silicon failure.

Design an energy efficient power management system in weeks, not months

SPIDER platform is a turnkey solution to achieve advanced power network design, verification & integration in weeks instead of months. It is built on our state-of-the-art IP portfolio available in a wide set of process nodes and fully customizable to any application thanks to our system-level power architecture utility. Thus, we bring our expertise into your hands to achieve ultimate energy efficiency, speed-up your design flow and secure your silicon.

  • Speed-up time-to-market: design your power management system in weeks instead of months
  • Achieve ultimate energy efficiency with advanced low power techniques and innovative SoC architecture powered by our state-of-the-art IPs
  • Secure silicon with standardized and predictable design methodology

Download our white paper on advanced power management techniques

Design teams must gain in energy efficiency by deploying increasingly complex power management techniques to meet the demands of the new IoT markets. This is particularly tricky in advanced IoT where near-sensor processing must be efficiently combined with RF connectivity, together with advanced power management.

  1. Introduction of context
  2. Power Management techniques short review
  3. Key configurations
  4. ULPMark Benchmark
  5. Results’ summary and benchmarking
  6. Conclusion
Power Management IPs

Energy-efficiency and low-power IP design are part of Dolphin’s DNA since its inception. Our configurable power management IP portfolio allows to achieve unprecedented low-power figures during sleep-mode and high-efficiency scores during active operation to maximize the battery autonomy. Discover how our low-leakage and low-quiescent LDO, nano-power DC-DC converters, low-frequency oscillators and power gating IP are built to work together and can easily be configured to match your application requirements.

  • Coherent IP tailored for ultimate efficiency in all power modes
  • Customizable to any application requirement
  • Seamless integration into the SoC
MAESTRO Power Controller: The keystone of the power management system

MAESTRO Power Controller brings you ultra-low consumption and high-flexibility for a best-in-class energy efficient power network. Built on a CPU-less architecture scalable to any SoC complexity, it manages the way energy is distributed to each block in the circuit, controls power sequencing and makes sure retention, power gating and isolation strategies are under control. MAESTRO works hand-in-hand with our power management IPs and is seamlessly configured with PowerStudio for a fast and predictable integration into your SoC.

  • Scalable to any SoC complexity
  • Fast and easy configuration with PowerStudio
  • CPU-less and event-based architecture for ultra-low power consumption
PowerStudio: our system-level utility for power management architecture, design and integration

PowerStudio is powered by Dolphin Design’s long expertise with power management design optimization. Compatible with any process node, already pre-configured with our IP portfolio and open to 3rd party IPs, it provides you with a single cockpit to build a safe power network configuration that matches your application requirements. From early power architecture exploration up to RTL/UPF low-power flow enablement, PowerStudio is at your side to standardize and accelerate your power management design flow.

  • Fast power architecture exploration and selection
  • Smooth  MAESTRO power controller configuration with automated testbench generation
  • Automated generation of RTL and UPF files to bridge the gap with front-end design flow
  • Open to third-party IPs and ready to support any process node 
Step 1: Fast power architecture exploration
Step 1: Intuitive MAESTRO Power Controller configuration
Step 1: Intuitive power modes sequencing
Step 2: Automated power architecture comparison and Figure of Merits for early PPA assessment
Step 3: Automated PMU RTL generation

Multiply your SoC energy efficiency by connecting SPIDER to our functional platforms

Speed Platform solution

Download the white paper:
Breaking new energy efficiency records with advanced power management platform

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