0.021mm² PVT-Aware Digital-Flow-Compatible Adaptive Back-Biasing Regulator with Scalable Drivers Achieving 450% Frequency Boosting and 30% Power Reduction in 22nm FDSOI Technology

This paper has been written jointly with CEA-Léti and GLOBALFOUNDRIES
Published in: 2021 IEEE International Solid- State Circuits Conference (ISSCC)

Y. Moursy, T. Raupp Da Rosa, L. Jure, S. Genevey, L. Pierrefeu, E. Grand, V. Huard , A. Bonzo, P. Flatresse – Dolphin Design, Meylan, France
A. Quelen, G. Pillonnet – CEA-Léti, Grenoble, France
J. Winkler – Globalfoundries, Dresden, Germany
J. Park – Globalfoundries, Santa Clara, CA

See the full article on IEEE website