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Found 408 Results

Page 10 of 46

Breakthrough innovation for TSMC 180 nm BCD Gen 2 process: Up to 30% savings in silicon area with the new SpRAM RHEA

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Conference papers

Embedding power regulation & activity control networks for best SoC PPA
SOI Industry Consortium

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Unique solution and methodology for reducing the power consumption for the SoC

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90% Reduction in power consumption for RFID chips with Dolphin Integration’s SESAME eLC standard cell library

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Dolphin Integration Joins GlobalFoundriesFDXcelerator™ Program to Provide Breakthrough Fabric IP

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Case study: Taishan Demochip – how to safely build a low-power SoC

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Shanghai Zhaoxin Semiconductor Co., Ltd. licenses Dolphin Integration ultra dense audio DAC for its next generation of Set Top Box

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Technical papers

Improving loading time on advanced nodes with SMASH™ mixed-signal simulator
B. Dumas, C. Valla, F. Espalieu

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A large range of sponsored IPs at 55 nm are now available to reduce SoC power consumption by up to 70%

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Page 10 of 46

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